1. Field of the Invention
The present invention generally relates to a method of driving a plasma display panel (hereinafter referred to as PDP) and its apparatus. More specifically, the method and apparatus of the present invention can reduce the back-glow phenomena caused by the discharge operation during the reset period for a PDP, therefore, enhancing the contrast of the plasma display panel.
2. Description of the Related Art
Plasma display is one of most promising flat panel display technologies because it can provide a large and flat display screen and can display full-color images. The basic theory and operation of a PDP is described below.
FIG. 1 is a cross-sectional view of a conventional PDP cell constructed by two glass substrates 1 and 7 and the components formed thereon. Inert gases, such as Ne and Xe, are filled in the cavity between the glass substrates 1 and 7. The components formed on the glass substrate 1 include sustaining electrodes X, scanning electrodes Yi, a dielectric layer 3 and a protective film 5. The components formed on the glass substrate 7 include address electrodes Aj and the fluorescent material 9 formed thereon. The rib 8 is formed on the peripheral of each PDP cell to isolate the PDP cell. Therefore, each PDP cell 10 includes three kinds of electrodes, i.e., the sustaining electrode X and the scanning electrode Yi, which is parallel to each other, and the address electrodes Aj crossing vertically the sustaining electrode X and the scanning electrode Yi.
FIG. 2 is a block diagram illustrating a plasma display formed by the PDP cells shown in FIG. 1. As shown in the drawing, the PDP 100 is driven by the scanning electrodes Y1xcx9cYn, the sustaining electrodes X and the address electrodes A1xcx9cAp. The position of the cell 10 is as shown in the drawing. Each cell is isolated by the rib 8 as shown in FIG. 1. Furthermore, the plasma display includes the control circuit 110, the Y scanning driver 112, the X sustaining driver 114 and the address driver 116. The control circuit 110 generates timing signals for the drivers according to the external clock signal CLOCK, the data signal DATA, the vertical synchronous signal VSYNC and the horizontal synchronous signal HSYNC, wherein the clock signal CLOCK represents the data transmittal clock, the data signal DATA represents the display data, and the vertical synchronous signal VSYNC and the horizontal synchronous signal HSYNC are respectively used to define the timing sequences of a frame and a scanning line. The control circuit 110 sends the display data and the clock signal to the address driver 116 and sends the corresponding frame control clock to the Y scanning driver 112 and the sustaining driver 114. The display data is sequentially transmitted to the address driver 116 by the control circuit 110 and wall charges are built to selected cell by the address discharges. Address discharges are caused by the data pulses of address electrodes A1xcx9cAp and the scanning pulses of scanning electrodes Y1xcx9cYn which are sequentially sent by the Y scanning driver 112. The detailed operation and the control signals for the electrodes are described below.
FIG. 3 is a diagram illustrating the manner to drive a conventional PDP to display a frame. As shown in the drawing, each frame is divided into eight sub-fields SF1xcx9cSF8. Each sub-field includes three operating period, that is, the reset period R1xcx9cR8, the address period A1xcx9cA8 and the sustain period S1xcx9cS8. In the reset period, the residual charges of the former sub-field are cleared to make the initial conditions of all cells before the address period almost the same. In the address period, the address discharges are initiated in the selected cells according to the display data and then wall charges are accumulated. In the sustain period, sustain discharges for displaying are repeatedly initiated and visible light can be produced in the cells which have accumulated charges through the address discharge in the address period. All of the PDP cells are processed at the same time during the reset period R1xcx9cR8 and the sustain period S1xcx9cS8. The address operation is sequentially performed for each cell on the scanning electrodes Y1xcx9cYn during the address period A1xcx9cA8. Moreover, the display brightness is proportional to the length of the sustain period S1xcx9cS8. In the example of FIG. 3, the length of the sustain periods S1xcx9cS8 of the sub-fields SF1xcx9cSF8 can be set in a ratio of 1:2:4:8:16:32:64:128 to display images in 256 gray scales.
FIG. 4 is a timing diagram of the voltage waveforms on the electrodes in a single sub-field of the prior art. The voltage waveforms on the address electrodes Aj are generated by the address driver 116, the voltage waveforms on the sustaining electrodes X are generated by the X sustaining driver 114, and the voltage waveforms on the scanning electrodes Y1xcx9cYn are generated by the Y scanning driver 112. As shown in the drawing, each sub-field includes the reset period, the address period and the sustain period. The voltage waveforms in each period and the resulted manners are described in detail below.
At the time point a (in FIG. 4) of the reset period, the voltage of the scanning electrodes Y1xcx9cYn is set to 0 V, and a write pulse having a voltage of VS+VW is applied to the sustaining electrode X, in which the voltage VS+VW is larger than the firing voltage between the sustaining electrode X and the scanning electrode Yi. Therefore, the global writing discharge W occurs between the sustaining electrode X and the scanning electrodes Yi. This discharge process accumulates negative charges on the sustaining electrode X and positive charges on the scanning electrodes Yi. The electric field produced by the accumulated negative charges and the positive charges will cancel out the voltage difference between the sustaining electrodes, thus the time of global writing discharge W is very short.
At the time point b, the sustaining electrode X is set to 0 V, and a sustaining pulse 202 having a voltage of VS is applied to all of the scanning electrodes Y1xcx9cYn, wherein the value of the voltage VS plus the voltage caused by the charges accumulated between the sustaining electrodes must be larger than the firing voltage between the scanning electrodes Yi and the sustaining electrode X. Thus, the global sustaining discharge S occurs between the sustaining electrode X and the scanning electrodes Yi. Different from the previous discharge process, this discharge process accumulates positive charges on the sustaining electrode X and negative charges on the scanning electrodes Yi.
At the time point c, the scanning electrode Yi is set to 0 V, an erase pulse 203 having a voltage lower than VS is applied to the sustaining electrode X, and an address pulse having a voltage of xe2x88x92VS can be applied to the address electrode Aj. The erase pulse is used to neutralize a part of the charges. On the scanning electrodes Y1xcx9cYn, required wall charges are left so that the write operation can proceed with a lower voltage in the sequential address period.
In the address period, the voltage of the sustaining electrode X and the scanning electrodes Yi are pulled up to VS at the time point d. Then a scan pulse 204 is sequentially applied to the scanning electrodes Y1xcx9cYn from the time point e, and an address pulse having a voltage of VA is applied to the address electrode Aj at the same time. When a cell of a scanning line turns ON, the write discharge occurs, that is, the corresponding display data is written into the cell.
After scanning all of the scanning electrodes Y1xcx9cYn, the sustain period begins. The sustaining electrode X and the scanning electrode Yi are first set to 0 V. Then the sustaining pulses 205 having the same voltage are applied to the sustaining electrode X and the scanning electrodes Yi in an alternate way, i.e., at the time point f and at the time point g. Thus, the cell with the data ON during the address period will irradiate. It should be noted that the waveform of driving signals described above is only an example. The waveform varies in practice, but the same theory is applied.
As described above, the length of the sustain period is proportional to the displayed brightness. Assume that a frame includes 510 sustain periods, in which each sustaining discharge period has two periods of discharge. The number of sustain periods for the sub-fields SF1xcx9cSF8 can be 2, 4, 8, 16, 32, 64, 128, and 256, respectively. Therefore, there are 1020 periods of discharge of the sustain period during the display period of a frame. This discharge operation enables a PDP device to display images.
On the other hand, 2 to 3 discharges, such as global writing discharge, global sustaining discharge and erase discharge, are performed during the reset period to uniformly distribute the wall charges. The discharges during the reset period can also make the PDP device irradiate with a brightness brighter than that produced by the discharge during the sustain period. Roughly speaking, the brightness produced by three periods of discharge during the reset period is about the brightness by five periods of discharge during the sustain period. The ratio of the highest brightness and the lowest brightness for the PDP device is about 1020:(5xc3x978)=26:1, in which 1 corresponds to the brightness of black. Therefore, the brightness produced by the discharge during the reset period should be as low as possible in order to improve the image quality of black, which is an important factor for displaying images. It is thus a significant issue to reduce the brightness produced by the discharge during the reset period.
Therefore, an object of the present invention is to provide a driving method of plasma display panels, with a plurality of sustaining electrodes (X1xcx9cXm) and a plurality of scanning electrodes (Y1xcx9cYn), configured in parallel and in an alternate sequence, and a plurality of address electrodes perpendicularly crossed over the sustaining electrodes and scanning electrodes; the dark areas Gj are defined between the scanning electrodes Yj and sustaining electrodes Xj; and the display areas Dj are defined between the scanning electrodes Yj and sustaining electrodes Xj+1 (n, m and j are integers, and 1xe2x89xa6jxe2x89xa6n and m). At the first timing point, applying a global writing voltage difference Vw between the scanning electrodes Yj and sustaining electrodes Xj, and there is no voltage difference between the scanning electrodes Yj and sustaining electrodes Xj+1. The global writing voltage difference Vw is greater than the firing voltage between the scanning electrodes Yj and sustaining electrodes Xj; whereby, the gas discharges are occurred between the scanning electrodes Yj and sustaining electrodes Xj, which generates space charges and wall charges in the dark areas Gj. Because the voltage difference between the scanning electrodes Yj and sustaining electrodes Xj+1 is below the firing voltage of the gas, there is no priming discharge operation in the display areas Dj.
Another object of the present invention is to provide a second driving method of plasma display panels, wherein, a plurality of sustaining electrodes (X1xcx9cXm) and a plurality of scanning electrodes (Y1xcx9cYn) configured in a sequence as X1-X2-Y1-Y2-X3-X4 . . . Xmxe2x88x921-Xm-Ynxe2x88x921-Yn, and a plurality of address electrodes perpendicularly crossed over the sustaining electrodes and scanning electrodes; wherein, the dark areas XGk are defined between the sustaining electrodes X2kxe2x88x921 and the sustaining electrodes X2k, and the dark areas YGk are defined between the scanning electrodes Y2k and the scanning electrodes Y2kxe2x88x921. And the display areas D2kxe2x88x921, are defined between the sustaining electrodes X2k and the scanning electrodes Y2kxe2x88x921, and the display areas D2k are defined between the scanning electrodes Y2k and the sustaining electrodes X2k+1 (n, m and j are integers, and 1xe2x89xa6jxe2x89xa6n and m). Wherein, at the first timing point in the reset period, apply a global writing voltage difference Vw to the dark areas XGk and YGk, but there is no voltage difference in the display areas D2kxe2x88x921 and D2k. The global writing voltage difference is greater than the firing voltage between the adjacent pairs of the sustaining electrodes X2kxe2x88x921 and X2k, and the adjacent pairs of the scanning electrodes Y2kxe2x88x921 and Y2k; whereby, the gas discharges are occurred in the dark areas XGk and YGk for the generation of space charges and wall charges, but do not proceed with the discharge operation in the display areas D2kxe2x88x921 and D2k.
These and further features, aspects and advantages of the present invention, as well as the structure and operation of various embodiments thereof, will become readily apparent with reference to the following detailed description of a presently preferred, but nonetheless illustrative embodiment when read in conjunction with the accompanying drawings, in which like reference numbers indicate identical or functionally similar elements throughout the enumerated Figures.